1. Technical Field
The present invention generally relates to computer systems and in particular to design tools in computer systems.
2. Description of the Related Art
Chipsets for high-performance and high-reliability servers support a multitude of Basic Input/Output System (BIOS) updatable registers that are used to set modes and thresholds that will influence how the chipset will operate. The chipset designers implement the modes and thresholds to give software the ability to set the modes/thresholds of a chipset (or chipset parameters) in a way that produces the best performance results. Typically, the parameters of a chipset are tuned on a performance test bed which requires considerable hardware resources, as well as significant amounts of time and expense. In addition, there is often scheduling pressure to bring the product to market, which limits the ability to adequately tune the chipset parameters.
Also, all chipset testing that is done before reaching the performance test bed stage of testing will have potentially been run with different mode/threshold settings. As a result, this practice can potentially mask chipset bugs that would not be exposed until reaching the performance test bed stage of testing. If a chipset bug associated with a particular combination of mode/threshold settings is not uncovered through chipset testing before the chipset is tested on the performance test bed, a database crash may occur, requiring many hours to restore the database. Given the interdependency between mode/threshold values, it is critical that various chipset mode/threshold combinations be tested before reaching the performance test bed stage.